Integrated VO₂ Oscillators Bring Mott Neurons On Chip

Compact spiking hardware has a packaging problem as much as a device-physics problem. VO₂ Mott devices can switch abruptly near room temperature and naturally generate thresholded oscillations, but many demonstrations still depend on discrete transistors, external resistors, or board-level coupling. This paper reports a monolithic one-transistor-one-memristor neuron that puts the VO₂ switching element and the silicon control device in the same back-end stack.

The result is best read as a hardware integration paper with device physics attached. The authors fabricate 60 nm VO₂ nanosheets with a 6 µm² active area above dielectrically isolated SOI p-type junctionless FETs, keep the pulsed-laser-deposition thermal budget below about 430 °C, and show room-temperature oscillatory neurons with measured energy down to 18 pJ per spike.

Core Contribution

The main contribution is the monolithic 1T-1MR architecture: a VO₂ two-terminal Mott memristor connected through metal-filled through-oxide vias to a junctionless FET that biases and tunes the oscillator. That matters because the transistor is not only a peripheral selector. It becomes the control element for bias current, voltage-controlled oscillation, pulse-to-spike conversion, and resistive coupling between oscillators.

Figure 1 shows the physical stack and material evidence behind that claim: the 3D layout, the fabricated chip, the JLFET gate stack after VO₂ integration, and nanosheet characterization by SEM, AFM, TEM, STEM-EDX, and SAED.

The novelty is therefore not that VO₂ can oscillate. Prior work has shown that. The paper’s stronger claim is that VO₂ Mott neurons can be built in a CMOS-compatible 3D integration flow while retaining useful tunability and coupling behavior.

Technical Approach

The device pairs a depletion/accumulation-controlled JLFET with a VO₂ nanosheet memristor. The VO₂ element provides hysteretic insulator-to-metal switching; the transistor sets the operating current. With an external capacitive oscilloscope load of 50 pF and 1 MΩ resistance in the measurements, the circuit charges until the VO₂ reaches its upper threshold, switches metallic, discharges toward the holding point, then returns to the insulating state.

The authors do more than report oscillation traces. They characterize JLFET transfer and output curves before and after VO₂ integration, measure VO₂ I-V hysteresis across temperature, and fit a compact analytical model in which insulating and metallic branches have different effective resistances and offset voltages. The methods section also describes finite-element simulations in COMSOL to estimate threshold power and temperature effects, with a thermal boundary resistance of 1.5 m²K/GW at the VO₂/SiO₂ interface.

Figure 3 captures the single-neuron result: a room-temperature oscillator trace, the equivalent circuit including the measurement load, and a frequency histogram over more than 200 cycles.

Results and Analysis

The headline measurements are credible for a proof-of-concept integrated neuron. The paper reports room-temperature frequency tunability from 40 kHz to 410 kHz, minimum VO₂ energy consumption of 18 pJ per spike, and about 8 µW power consumption in the VO₂ device, with the authors estimating potential operation below 3 µW under more favorable biasing. In the Figure 3 device, the peak frequency is 410 kHz with a standard deviation of 18.8 kHz across more than 200 cycles.

The temperature and bias results are more interesting than a simple speed number. From 25 °C to 45 °C, the oscillation frequency changes non-monotonically with both substrate temperature and bias current. The authors attribute this to competing time constants in the insulating and metallic states, rather than a single threshold shift. Their model tracks the deterministic behavior up to roughly 45 °C; above that, the paper says stochastic analysis is required.

The stochastic firing analysis is a useful caveat rather than a side result. When the circuit operates near or beyond the analytically defined holding-voltage oscillation condition, escape times and period histograms move between exponential-like and Gaussian-like shapes. The authors simulate this by adding bandwidth-limited 1/f noise and a time-dependent holding voltage, arguing that thermal relaxation after Joule heating delays the next crossing event.

The system-level demonstrations are modest but relevant. A voltage-controlled oscillator responds to ramp, sinusoidal, and square gate drives, with square pulses at 5 kHz and 10 kHz producing spike counts that increase linearly with pulse duration. Two VO₂ oscillators coupled through an on-chip depletion-mode JLFET converge to a common mean frequency of 43 kHz despite static I-V mismatch, with reported frequency standard deviations of about 13 kHz and 15 kHz.

Figure 7 is the most direct evidence that the integration path can support coupled oscillator dynamics rather than only isolated neurons.

Caveats in Practice

The paper does not yet demonstrate a large array, learning rule, or neuromorphic workload. Several measurements include the oscilloscope load, so circuit-level energy in a scaled readout environment remains to be shown. The authors also state that device-to-device and die-to-die variability must be investigated before very-large-scale integration. The work establishes a plausible integrated device platform; it does not yet prove a deployable spiking computing system.